MRD531 (SOP)
Lead Free CMOS Frequency/Double Frequency (F2F) Decoder Chip
- TAA Compliant
- Triple track F2F decoder chip
- Support 3.3V~5.0V working environment
- Enhanced noise filter
- SOP 28 PIN
- Integrated Amplification Circuit for magnetic head signal
- Both output polarities supported
- Adjustable read data output clock pulse width
- Triple channel and support for 75/210bpi recording density
- Magnetic head data input frequency range from 300 bit/sec to 12600 bit/sec
- Power-down stand-by mode to reduce current consumption
- 11 leading bits ignored
- Enhanced noise filter
- Automatic offset voltage cancellation circuit for amplifiers
- Advanced algorithm to effectively read poor condition cards as well as high jitter cards
The MRD531 is a lead-free CMOS integrated circuit that recovers F2F encoded data received from a magnetic head.